Performance update

The Internet is an amalgam of forms blurred under epistemological pressures. In Søren Kierkegaard’s words, under this flat shower of leveled information, where everybody is interested in everything and nothing is too trivial or too important, people just accumulate information and postpone decisions indefinitely, i.e., nobody takes action and nobody is responsible for truth — there is no mastery, just gossip. He called this the æsthetic sphere of existence, exhorting us to evolve to the ethical sphere, where we do not just accumulate information but take action and make commitments. Blogs are instruments to overcome flatness by creating opportunities for vertical activities. In this sense this blog is a view from my window — a collection of tidbits I judged relevant to computational color science and in general to the promotion of scientific excellence in areas of strategic importance for the future of research, economy and society.

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» Performance update

A year ago I posted two entries on hyperthreads and multicores that were relatively popular. A short post on the the Performance Agora has an interesting comparison of the performance of the latest crop of Intel chips suggesting that the 8-way Penryn TPC-C performance now matches a 16-way Xeon of 2 years ago.

Performance experts like Neil Gunther worry mostly about database transactions and servicing HTTPS requests. For us color scientists working on color reproduction systems, the performance picture is different. Historically, we have always been fighting with the problem that we are ten years behind marking engine designers in terms of ripping pages as fast as the printers can consume them.

For us the hour of truth will come at the end of this year, when Intel will start shipping Nehalem. We will have to revisit our software architectures to take advantage of the new QuickPath platform architecture with fast integrated memory controllers. With QuickPath each processor has its own dedicated memory, so we will have to redesign how we map rendering in memory.

Faster bus and better stall prevention, will probably allow us to use more GPUs per system, which will likely require we rearchitect our whole rendering pipelines.

For more details on Nehalem, see Intel's whitepaper. For more details on QuickPath, see this other withepaper.

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